6/18/2023 0 Comments Altium designerThe library design parameters were set by need of regular low and medium density boards. NetTieLibSource - source files used for building NetTieLib.IntLib, you can open NetTieLib.LibPkg file in Altium Designer, modify the library and compile it back into IntLib file which will be located in NetTieLibSource\Outpupt\.NetTieLibSampleBoard - sample PCB project with all components from the NetTieLib, DRC exception rules applied.DRC exceptions - RUL files with DRC exception rules which suppress violations in PcbDoc when NetTieLib components are used.Documentation - documentation to NetTieLib and Net Tie components in general.NetTieLib.IntLib - integrated library NetTieLib which can be installed and used in Altium Designer.To "net-tie" different signals from several layers, use a NetTieVia component. Altium Designer do not reports those short circuit connections as DRC violation if the connection is done by a Net tie component. The Net Tie component in fact creates a short circuit connection of the signals. The library contains special Net Tie components which are used in Altium Designer to split one signal/net into several signals/nets or join several signals/nets into one signal/net. The library is distributed free of charge. Please feel free to modify the library components according to your design standards. The library NetTieLib is distributed "as is" with no warranty.
0 Comments
Leave a Reply. |